The Chip-Scale Atomic Clock - Recent Development Progress
SYMMETRICOM-TECHNOLOGY REALIZATION CENTER BEVERLY MA
Pagination or Media Count:
We have undertaken the development of a chip-scale atomic clock CSAC whose design goals include short-term stability, sigmasub ytau1 hour, of 1x10exp 11 with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small 5 mmexp 3 gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping CPT interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser VCSEL sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.
- Lasers and Masers
- Test Facilities, Equipment and Methods