Final rept. 7 Aug 1997-31 Aug 2002
CALIFORNIA UNIV IRVINE DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
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The MorphoSys architecture is a coarse-grain, reconfigurable computing architecture. This program was funded by DARPA in support of the Adaptive Computing Systems ACS Technology Initiative. The architecture was successfully functionally prototyped with the fabrication of the M1 chip. This report will review the MorphoSys architecture and the M1 chip. The tools and application mappings are described. The design improvements to the M1 is detailed as the M2 chip design. Additionally, MorphoSys application domains are detailed. Technology transition success through the DARPA Mission Specific Processing Technology Initiative, the MorphoSys related Morpho Technologies venture capital startup, and Motorola licensing agreements are also touched upon. Finally, a program summary is provided.
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