Accession Number:

ADA415065

Title:

Implementation of a Configurable Fault Tolerant Processor (CFTP)

Descriptive Note:

Master's thesis

Corporate Author:

NAVAL POSTGRADUATE SCHOOL MONTEREY CA

Personal Author(s):

Report Date:

2003-03-01

Pagination or Media Count:

139.0

Abstract:

The space environment has unique hazards that force electronic systems designers to use different techniques to build their systems. Radiation can cause Single Event Upsets SEUs which can cause state changes in satellite systems. Mitigation techniques have been developed to either prevent or recover from these upsets when they occur, At the same time, modifying on-orbit systems is difficult in a hardwired electronic system. Finding an alternative to either working around a mistake or having to keep the same generation of technology for years is important to the space community. Newer programmable logic devices such as Field Programmable Gate Arrays FPGAs allow for emulation of complex logic circuits, such as microprocessors. FPGAs can be reprogrammed as necessary, to account for errors in design, or upgrades in software logic circuits.

Subject Categories:

  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE