Using Loop-Level Parallelism to Parallelize Vectorizable Programs
Final rept. Oct 1999-Apr 2001
ARMY RESEARCH LAB ABERDEEN PROVING GROUND MD
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One of the major challenges facing high performance computing is the daunting task of producing programs that achieve acceptable levels of performance when run on parallel architectures. Although many organizations have been actively working in this area for some time, many programs have yet to be parallelized. Furthermore, some programs that were parallelized were done so for obsolete systems. These programs may run poorly, if at all, on the current generation of parallel computers. Therefore, a straightforward approach to parallelizing vectorizable codes is needed without introducing any changes to the algorithm or the convergence properties of the codes. Using the combination of loop-level parallelism and RISC-based shared memory SMPs has proven to be a successful approach to solving this problem.
- Computer Programming and Software
- Computer Hardware