Parallel Error Coding Decoding for Highly Parallel Memories
Final technical rept. 1 Aug 93-31 Mar 97
ARIZONA UNIV TUCSON DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
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Optical storage systems offer the potential for drastically increased data transfer rates through the use of parallel access. It is unrealistic however, to devote conventional serial electronic error correction hardware to such a large number i.e., 10exp 3 - 10exp 6 of data channels. We have focused therefore, on the development and evaluation of parallel error correction schemes for use with parallel optical memories. The principal focus of this work has been on the development, evaluation, and demonstration of parallel ECC algorithm and implementations for use with parallel access optical storage media. With volume holographic parallel access memories in mind, we have developed parallel ECC schemes that demonstrate burst error tolerance and low area overhead i.e., high code rate. Further, these new schemes map well onto VLSI hardware and efficient electronic parallel implementations have been demonstrated. Specific research results include 1 Extension of conventional serial 1D codes to 2D, 2 Design and fabrication of 2D parallel decoders electronic and optoelectronic, 3 Optimization of capacity gain achieved through ECC, 4 Characterization of crosstalk noise in holographic storage and development of detection and apodization techniques for it. mitigation, 5 A comprehensive study of optical system design issues and their impact on volume storage capacity and density.
- Electrooptical and Optoelectronic Devices
- Computer Programming and Software