Low Engery/Low Noise Elec. Comp. for Mobile Platform Apps.
Final rept. 1 Sep 96-Jun 97,
ILLINOIS UNIV AT CHICAGO CIRCLE
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We prototyped Polyfet RF Devices 80V LDMOSFETs on bulk silicon substrates using advanced numerical two-dimensional 2D finite-element semiconductor process and device simulators and showed excellent agreement between measured and simulated DC and RF parameters. This infrastructure was then used to develop a number of 40V LDMOSFET designs, both on bulk silicon and SOI material, and identify optimum device structures suitable for further development in Phase II. Our Phase I research has shown the SOI LDMOSFETs promise significant improvements in gain, noise figure, efficiency and manufacturing cost compared to bulk devices. These results are highly promising and provide the impetus for further investigation and development.
- Electrical and Electronic Equipment