High Speed Circuits and Packaging Technology for Advanced Laser Altimeter Systems.
Progress rept. 1 Apr-30 Jun 96,
ROCKWELL INTERNATIONAL THOUSAND OAKS CA SCIENCE CENTER
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In this report, progress on the high speed circuits and packaging technology for advanced laser altimeter systems is reported for the months of 1 April 1996 to 30 June 1996. During this time, significant progress has been made on both the 800 Mss and 3000 Mss data acquisition system. For the 800 Mss system, the ADC has been packaged and tested, the DEMUX substrate has been submitted for fabrication, and the packaged TIU is in the final stages of testing. The second cut schematic for the system has been designed and several PCB are presently being designed. The system timing of the 800 Mss system has been studied in great detail to assure the desired altimeter accuracy. For the high-speed system, the first test GaAs FIFO memory cells 512 x 1 have been fabricated and tested to 500 MHz. The memory design has been improved to make it less susceptible to switching noise. The second GaAs test cell has also be fabricated and is presently being tested. The CMOS FIFO is in the final design phase and should be submitted for fabrication in 3 months.
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