Research and Development of a High Performance GaAs Microcomputer System.
MICHIGAN UNIV ANN ARBOR
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The object ot this research was to achieve an order or magnitude increase in RISC microprocessor computing power over the duration of the project. This was to result in a processor capable of executing MIPS instructions at a sustained rate of 150 million instructions per second, and a peak rate of 250 million instructions per second. We proposed implementing the machine in gallium arsenide direct-coupled FET logic DCFL from Vitesse Semiconductor, which showed promise as a high-performance technology. To achieve this goal, the GaAs process would have to be increased substantially over their levels at the beginning of the project. Circuits would have to be designed to take advantage of the inherent speed in GaAs devices while overcoming the limitations of DCFL. Microarchitectures would have to be developed to be appropriate for a processor with this high clock rate. We also proposed developing a comprehensive suite of CAD tools to support the design of such processors. This would include architectural, logic, and circuit simulators it would build on the technology-independent physical design software of Cascade Design Automation to realize a GaAs circuit compiler.
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