Accession Number:

ADA289875

Title:

The Mesh Synchronous Processor MeshSP (trademark).

Descriptive Note:

Technical rept.,

Corporate Author:

MASSACHUSETTS INST OF TECH LEXINGTON LINCOLN LAB

Personal Author(s):

• Gilbert, I. H.
• Farmer, W. S.

Report Date:

1994-12-14

Pagination or Media Count:

99.0

Abstract:

The Mesh Synchronous Processor MeshSP is a parallel computer architecture, primarily SIMD, combining high throughput with modest size, weight, power, and cost. Each MeshSP processor node consists of a single DSP chip the ADSP-21060 SllARC chip of Analog Devices Inc. The MeshSP-1 processor, a hardware realization of the MeshSP, incorporates an 8 X 8 array of ADSP-21060 chips, providing a peak throughput of 7 GFlops. The processor is programmed in ANSI C or C with no parallel extensions. A combination of on-chip DMA hardware and system software makes data IO and interprocessor communication uniquely simple. The MeshSP is easily programmed to solve a wide variety of computationally demanding signal-processing problems. A functional Simulator enables MeshSP algorithms to be coded and tested on a personal computer. Some example applications are described.

Descriptors:

• *COMPUTER ARCHITECTURE
• *PARALLEL PROCESSORS
• COMPUTER PROGRAMS
• ALGORITHMS
• SIGNAL PROCESSING
• SIMULATORS
• PEAK VALUES
• HIGH RATE
• CHIPS(ELECTRONICS)
• PARALLEL PROCESSING
• NODES
• COSTS
• THROUGHPUT
• MICROCOMPUTERS
• ADAPTERS

Subject Categories:

• Computer Programming and Software

Distribution Statement:

APPROVED FOR PUBLIC RELEASE