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Minimizing the Impact of Synchronization Overhead in Parallel Discrete Event Simulations.
AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING
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A Parallel Discrete Event Simulation Coprocessor was designed for conservative synchronization protocols and was implemented in software using some of a parallel computers nodes to act as coprocessors. The coprocessor was designed to offload synchronization overhead and next event queue management from the nodes running the simulation. The coprocessor was designed to accelerate simulations based on the Simulation Protocol Evaluation on a Concurrent Testbed with ReUsable Modules SPECTRUM environment. The research was conducted in three steps the SPECTRUM environment was ported from an Intel iPSC2 to an Intel Paragon XPS, the coprocessor was designed and the simulations were timed, with and without the coprocessor. In some cases, the coprocessor provided up to a 2.5 times speedup.
APPROVED FOR PUBLIC RELEASE