Waves VHDL Interface
ROME LAB ROME NY
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The Waveform and Vector Exchange Specification WAVES is the Industry standard representation for digital stimulus and response for both the design and test communities. The VHSIC Hardware Description Language VHDL is the Industry standard language for the design, modeling, and simulation of digital electronics. Together VHDL and WAVES provide powerful support for top-down design and test methodologies and concurrent engineering practices. Although the syntax of WAVES is a subset of VHDL, no special support for using WAVES in a VHDL environment is defined within the language. This report will introduce and describe a VHDL package that was developed at Rome Laboratory to provide a software interface to support the use of WAVES in a VHDL environment. This VHDL package is referred to as the WAVES VHDL interface and has been proposed as a standard practice for a top-down design and test methodology using WAVES and VHDL. This report is not intended to provide a tutorial on VHDL or WAVES. It is assumed that the reader has an adequate understanding of the VHDL language and some modeling techniques. Further, it is assumed that the reader has an understanding of the WAVES language and can follow a simple Level 1 dataset description. VHDL, VHSIC, Design, Test, Top down design, Design verification, WAVES, Concurrent engineering.
- Electrical and Electronic Equipment
- Computer Programming and Software