Accession Number:

ADA280256

Title:

FY 1995 President's Budget Readiness Justification Book, Department of the Navy

Descriptive Note:

Corporate Author:

DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s):

Report Date:

1994-05-01

Pagination or Media Count:

26.0

Abstract:

This report describes progress towards completing development of a high speed data acquisition system DAS. Objectives for the preceding 12 months were to demonstrate ADC hybrid operation, revise the ADC IC designs as required, produce the digital GaAs HBT ICs and complete system hardware and software design. Despite problems, substantial progress was made towards achieving these objectives. Analog wafers fabricated in 1991 were tested and ADC hybrid built. Though problems with these 1991 wafer limited the data that could be taken, chip function and accuracy were verified. This provided the confidence to execute a minor redesign of the analog chip mask set. Wafers fabricated with the new mask set have shown dc accuracy and yield far exceeding program requirements. Two prototype production ADC hybrids have been developed and initial low frequency test data is excellent. High speed testing is in progress

Descriptors:

• *SYSTEMS ENGINEERING
• *NAVAL PERSONNEL
• *FABRICATION
• *INTEGRATED CIRCUITS
• *DATA ACQUISITION
• *HYBRID CIRCUITS
• *PLANNING PROGRAMMING BUDGETING
• SOFTWARE ENGINEERING
• MANPOWER UTILIZATION
• NAVAL BUDGETS
• ASSEMBLY
• BIPOLAR TRANSISTORS
• WAFERS
• HETEROJUNCTIONS
• PROTOTYPES
• CHIPS(ELECTRONICS)
• GALLIUM ARSENIDES
• PERSONNEL MANAGEMENT
• COMBAT READINESS

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE