Accession Number:

ADA276456

Title:

DLTS and Dynamic Transconductance Analysis of Deep-Submicron Fully- Depleted SOI MOSFET's

Descriptive Note:

Quarterly technical rept. 1 Oct-31 Dec 1993

Corporate Author:

GEORGE MASON UNIV FAIRFAX VA

Personal Author(s):

Report Date:

1993-12-31

Pagination or Media Count:

47.0

Abstract:

An experimental study of the degradation mechanisms in hot-carrier stressed partially- and fully-depleted SOISIMOX nMOSFETs has been carried out as a function of device drain design and fabrication technology, in an effort to develop hot-electron resistant devices that are suitable for space and satellite applications. A multitude of experimental techniques were used for this purpose, including the newly developed sequential frontback channel stressing measurement tech which makes use of the hot-hole injection into the opposite channel that occurs in hot-electron stressed SOI MOSFETs. In addition, copious PISCES simulations were performed for the correct interpretation of the experimental results. It was shown that the hot-carrier degradation is mainly caused by a two step process a rather slow oxide electron trap generation followed by a fairly fast electron filling of these traps. Moderate amounts of interface state generation may also take place under some bias conditions. The detailed analysis of the hot-hole injection into the opposite gate oxide leads to new insights on the role played by the hot-holes in the overall degradation process.

Subject Categories:

  • Inorganic Chemistry
  • Physical Chemistry
  • Electrical and Electronic Equipment
  • Electricity and Magnetism

Distribution Statement:

APPROVED FOR PUBLIC RELEASE