Accession Number:

ADA270596

Title:

Image Understanding Architecture

Descriptive Note:

Final rept. Sep 86-Sep 91,

Corporate Author:

MASSACHUSETTS UNIV AMHERST DEPT OF COMPUTER AND INFORMATION SCIENCE

Report Date:

1991-09-01

Pagination or Media Count:

63.0

Abstract:

The primary goal of the Image Understanding Architecture IUA project was to build a proof-of-concept prototype of a 164th slice of a parallel architecture to support real-time, knowledge-based image understanding, and develop the software support environment that will be needed to utilize the hardware. The unique feature of the IUA is that it tightly couples three distinctly different parallel architectures whose capabilities are matched to the computational requirements of the three primary levels of abstraction in knowledge-based computer vision. The low-level processor CAAPP is a SIMD cellular array designed to perform sensory preprocessing. The intermediate-level processor ICAP is intended to support computation on symbolic data that has been extracted from the images or instantiated from stored models. The high- level processor SPA supports the general knowledge-based processing which employs multiple strategies to form an interpretation of a scene. The majority of the hardware effort has taken place at Hughes Research Laboratories, Malibu, California, although UMass has principle responsibility for the design of the IUA architecture. UMass has also undertaken some smaller portions of the hardware development the feedback concentrator for the low and intermediate- level arrays, and the communications router for the intermediate-level array. The majority of the software effort took place at UMass, although Hughes was also involved in some software development, both in support of their hardware efforts, and in the form of algorithm development for specific applications on the IUA.

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware
  • Cybernetics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE