Design of a Digital Data Recording System (DRS),
NAVAL RESEARCH LAB WASHINGTON DC
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The Data Recording System DRS for the Delayed Digital Side Lobe Canceler DDSLC radar signal processor is a 4 MByte digital data recorder capable of a 10.67 Mwords data rate 1 word 32 bits. The recorder may be employed to collect live digitized radar data and store it on high volume data devices such as a Bernoulli cartridge or an optical disk to make it available for future off-line processing. This paper describes the hardware design, controlling software, and implementation of the data recording system developed at NRL. Radar, Data recording.
- Active and Passive Radar Detection and Equipment