A Digital Satellite Delay Simulator
ROYAL SIGNALS AND RADAR ESTABLISHMENT MALVERN (UNITED KINGDOM)
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This document describes the design and operation of a bidirectional digital satellite delay simulator. The data rates which are catered for are 2400, 3600, 7200 and 16000 bps, but other data rates could be included with only minor modification. The circuit is based on the Motorola 6809 microprocessor which uses the Motorola 6852 synchronous serial data adapter SSDA as the interface devices.
- Computer Hardware