Accession Number:

ADA244370

Title:

Asynchronous Design for Parallel Processing Architectures

Descriptive Note:

Semiannual rept. Jul-Dec 91,

Corporate Author:

STANFORD UNIV CA

Personal Author(s):

Report Date:

1991-12-01

Pagination or Media Count:

2.0

Abstract:

The objective of this research is to provide a design methodology for connecting heterogeneous hardware modules that have inherently different functional and timing behavior. With the constraints dictated by the system- level interaction, we need to adopt a modular design approach without compromising the global performance. The main task of this effort will be the development of the theory for optimal interface circuits synthesis from high- level specification, with emphasis on testability and performance. In July-Dec 1991 we have concentrated on the gate-level synthesis of asynchronous control circuits and introducing timing information into the synthesis process to increase circuit performance.

Subject Categories:

  • Electrical and Electronic Equipment
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE