Accession Number:

ADA243652

Title:

Electrically Erasable Programmable Integrated Circuits for Replacement of Obsolete TTL Logic

Descriptive Note:

Master's thesis,

Corporate Author:

AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING

Personal Author(s):

Report Date:

1991-12-01

Pagination or Media Count:

240.0

Abstract:

Two microcircuits with electrically erasable programmable logic arrays, which use Fowler-Nordheim F-N tunneling for both programming and erasing, were designed to demonstrate the use of programmable logic for obsolete TTL logic replacement. Each microcircuit was fabricated in the Orbit 2-micron double-poly low noise analog CMOS process through MOSIS. Software to generate VHDL structural models from a pin list was developed and the logic of both designs was verified by simulation using the Zycad VHDL simulator. The first microcircuit included a simple programmable logic circuit and test cells that allowed measurement of the programming characteristics of the floating gate transistors. Test result on this microcircuit show a wide variance of programmability even between similar transistors on the same die. Some evidence of F-N tunneling from the control gate to the floating gate was also noted. The second microcircuit was designed to emulate the logic of a group of combinational TTL circuits. VHDL simulation was successful for each emulation. Device testing provided limited results due to a design error however, successful emulation of two sections of a 7400 quad-NAND circuit was achieved. Author

Subject Categories:

  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE