Accession Number:

ADA242660

Title:

BM/C3 Force Model VLSI/VHSIC Digital Processing: A Cost Methodology

Descriptive Note:

Corporate Author:

TECOLOTE RESEARCH INC SANTA BARBARA CA

Personal Author(s):

Report Date:

1988-10-01

Pagination or Media Count:

61.0

Abstract:

The primary objective of the paper is to investigate estimating methodologies for special-purpose, mobile-based Digital Processors with VLSI VHSIC technologies. This paper also documents the First Order Processor Estimator FOPE for processors based on ground, mobile, airborne, or spaceborne platforms. In addition, this paper will serve as a primer on processing cost drivers and major technical issues. Much of the information contained in this report has been collected from informal sources i.e., telephone conversations, sales brochures, catalogs, etc., and thus is presented fairly informally. No attempt is made to collect proprietary or sensitive information, or to investigate or present exotic or esoteric technical issues regarding processors. The information is presented using lay language. Technical jargon is avoided and concepts are kept simple. The idea is not to document a rigorous engineering breakthrough, but rather to discuss relevant technical and cost issues regarding special-purpose digital processors. Appendix A contains a short discussion of off-the-shelf general-purpose processing suites.

Subject Categories:

  • Computer Systems

Distribution Statement:

APPROVED FOR PUBLIC RELEASE