A Fast Multiport Memory Based on Single-Port Memory Cells
MASSACHUSETTS INST OF TECH CAMBRIDGE LAB FOR COMPUTER SCIENCE
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We present a new design for dual-port memories that uses single-port memory cells but guarantees fast deterministic readwrite access. The basic unit of storage is the word, rather than the bit, and addressing conflicts result in bit errors that are removed by correction circuitry. The addressing scheme uses Galois field arithmetic to guarantee that the maximum number of bit errors in any word accessed is one. These errors can be corrected every time with a simple correction scheme. The scheme can be generalized to an arbitrary number of ports.
- Computer Hardware