Performance Implications of Synchronization Support for Parallel FORTRAN Programs
ILLINOIS UNIV AT URBANA CENTER FOR RELIABLE AND HIGH-PERFORMANCE COMPUTING
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This paper studies the performance implications of architectural synchronization support for automatically parallelized numerical programs. As the basis for this work, we analyze the needs for synchronization in automatically parallelized numerical programs. The needs are due to task management, loop scheduling, barriers, and data dependency handling. We present synchronization algorithms for efficient execution of programs with nested parallel loops. Next, we identify how various hardware synchronization primitives can be used to satisfy these software synchronization needs. The synchronization primitives studied are test and set, fetch and add, exchange- byte and synchronization bus implementation of lockunlock operations. Lastly, we ran experiments to quantify the impact of various architectural support on the performance of a bus-based shared memory multiprocessor running automatically parallelized numerical programs. We found that supporting an atomic fetch and add primitive in shared memory is as effective as supporting lockunlock operations with a synchronization bus. Both achieve substantial performance improvement over the cases where atomic test and set and exchange- byte operations are supported in shared memory.
- Computer Programming and Software
- Computer Systems