Asynchronous Design for Parallel Processing Architectures
Semiannual rept. Jan-Jul 91,
STANFORD UNIV CA
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The objective of this research is to provide an interconnect synthesis methodology which facilitates a modular design approach without compromising the global performance. The main tasks of this effort will be the development of the theory for optimal interconnect circuit synthesis from a high level specification, with emphasis on testability and fault tolerance asynchronous interface among concurrently computing hardware, and the application of this design methodology to physical implementations of parallel processing systems.
- Electrical and Electronic Equipment
- Computer Hardware