Designing a Virtual-Memory Implementation Using the Motorola MC68010 16- Bit Microprocessor with Multi-Processor Capability Interfaced to the VMEbus
NAVAL POSTGRADUATE SCHOOL MONTEREY CA
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The primary purpose of this thesis is to explore and discuss the hardware design of a bus-oriented microprocessor system. A bus-oriented microprocessor system permits it to be expanded to a multi-processor system. Through the use of a bus controller and bus arbiter, as discussed in this thesis, the necessary logic is in place to control bus access by system users. Bus access may be initiated to share another sub-systems resource, such as memory. To accommodate memory sharing between two systems, a dual-port memory controller can be used to resolve memory access between the two systems. This thesis discusses the design of a MC68010 microprocessor system integrated on the VMEbus with dual-ported memory capability. Additional features of the MC68010 microprocessor system include memory-management and interrupt control. The memory-management features permit protected memory and virtual-memory to be implemented on the system, while an interrupt handler is used to assist the MC68010 microprocessor in exception processing.
- Computer Systems
- Command, Control and Communications Systems