VLSI Design for Reliability
Final rept. Sep-Nov 1989
ILLINOIS UNIV AT URBANA COORDINATED SCIENCE LAB
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This report contains the results of supplementary work done related to the reliability analysis of Application Specific Very Large Scale Integrated ASIC VLSI CMOS circuits. The major work is currently being carried out under Task N-9-5716. The main goal of both tasks is to determine the electromigration susceptibility of VLSI circuits. Electromigration is a major reliability problem caused by the transport of atoms in a metal line due to the electron flow. Under persistent current stress, electromigration can cause deformations of the metal lines which may result in shorts or open circuits. The failure rate due to electromigration depends on the current density in the metal lines and is usually expressed as a median-time-to-failure MTF. This work focuses on the electromigration problem in the power and ground busses. To estimate the bust MTF, an estimate of the current waveform in each branch of the bus is required. In general, the MTF is dependent on the shape of the current waveform, and not simply on its time-average. However, a very large number of such waveform shapes are possible, depending on what inputs are applied to the circuit. This is especially true for complementary metal oxide semiconductors circuits, which draw current only during switching.
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