Accession Number:

ADA224060

Title:

Touchstone Project DELTA Numeric Node: Milestone Event Q4

Descriptive Note:

Special technical rept.

Corporate Author:

INTEL CORP BEAVERTON OR INTEL SCIENTIFIC COMPUTERS

Personal Author(s):

Report Date:

1989-12-28

Pagination or Media Count:

120.0

Abstract:

The aggregate performance of any parallel computer system is directly related to the performance of the systems individual processors. The DELTA numeric node prototype addresses this issue by utilizing the latest in high performance off the shelf microprocessor technology. The DELTA numeric code, named RX-1 based on the Intel 80860 microprocessor. This single component provides an unprecedented amount of hardware integration which in turns allows a very high performance processing node to be packaged on a single printed circuit board. The RX-1 node design had two simple goals 1 Provide an i860 node for the DELTA prototype is a 2D mesh-organized multicomputer also being developed under the DARPA sponsored Touchstone program and 2 Through the process of designing both hardware and software for the i860 node, gain valuable experience which could then be applied to a second generation effort. The RX-1 node has been designed, built and tested. The major features are 40MHz system clock On board 8 M-byte DRAM array expandable to 32 M-bytes with 4 M-bit DRAM technology A general purpose expansion connector for attaching additional DRAM, second level cache, frame buffer or any other imagined appendage A FIFO based interface to the internal system network A modular approach for attaching the internal system message passing circuitry A low speed high reliability serial channel for system boot and diagnostics IO support for performance analysis instrumentation and a 56-bit counter with 100ns granularity for system timing. KR

Subject Categories:

  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE