ARTIST: A Silicon Assembler for Mesh Arrays.
PENNSYLVANIA STATE UNIV UNIVERSITY PARK DEPT OF COMPUTER SCIENCE
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This paper describes a VLSI layout assembler, ARTIST, under development at Penn State. ARTIST performs transistor placement and interconnection within a module. Novel ideas used in the design of the assembler are described. A modular software design is used so that we can easily try different approximation algorithms for transistor placement. A comparison between simulated annealing and a totally random approach is presented. Surprisingly, the random approach is better for realistic running times. Finally, a hybrid approximation algorithms for transistor placement is described and is shown to be better than either of the other two algorithms. Author
- Electrical and Electronic Equipment
- Computer Programming and Software