Accession Number:

ADA184329

Title:

The Warp Computer: Architecture, Implementation, and Performance.

Descriptive Note:

Technical rept.,

Corporate Author:

CARNEGIE-MELLON UNIV PITTSBURGH PA ROBOTICS INST

Report Date:

1987-07-01

Pagination or Media Count:

32.0

Abstract:

The Warps machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second 10 MFLOPS. A typical Warp array includes 10 cells, thus having a peak computation rate of 100 MFLOPS. The Warp array can be extended to include more cells to accommodate applications capable of using the increased computational bandwidth. Warp is integrated as an attached processor into a UNIX host system. Programs for Warp are written in a high-level language supported by an optimizing compiler. The first 10-cell prototype was completed in February 1986 delivery of production machines started in April 1987. Extensive experimentation with both the prototype and production machines has demonstrated that the Warp architecture is effective in the application domain of robot navigation, as well as in other fields such as signal processing, scientific computation, and computer vision research. For these applications, Warp is typically several hundred times faster than a VAX 11780 class computer. This paper describes the architecture, implementation and performance of the Warp machine. Each major architectural decision is discussed and evaluated with system, software and application considerations. The programming model and tools developed for the machine are also described, The paper concludes with performance data for a large number of applications.

Subject Categories:

  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE