Accession Number:

ADA183772

Title:

Specification and Design Methodologies for High-Speed Fault-Tolerant Array Algorithms and Structures for VLSI.

Descriptive Note:

Final rept.,

Corporate Author:

CALIFORNIA UNIV LOS ANGELES DEPT OF COMPUTER SCIENCE

Personal Author(s):

• Ercegovac, Miloes D.
• Avizienis, Algirdas
• Lang, Tomas

Report Date:

1987-06-01

Pagination or Media Count:

53.0

Abstract:

For convenience we summarize here the project objectives as stated in the research proposal. This research in the methodologies for the specification and design of high-speed, fault-tolerant VLSI array structures has two related objectives 1 a high-level language approach to the specification and simulation of VLSI algorithms and networks using a functional-style LISP-like language Task 1, and 2 cost-effective methods to introduce fault-tolerance error detection, fault location, retry, and reconfiguration into VLSI-implemented systolic systems and similar computing arrays Task 2.

Descriptors:

• *ALGORITHMS
• *FAULTS
• *ARRAYS
• *STRUCTURES
• *HIGH LEVEL LANGUAGES
• *SIMULATION
• ALGORITHMS
• ARRAYS
• COST EFFECTIVENESS
• DETECTION
• ERRORS
• FAULT TOLERANT COMPUTING
• FAULTS
• HIGH LEVEL LANGUAGES
• HIGH VELOCITY
• METHODOLOGY
• SIMULATION
• STRUCTURES

Subject Categories:

• Electrical and Electronic Equipment
• Computer Programming and Software

Distribution Statement:

APPROVED FOR PUBLIC RELEASE