CMOS (Complementary Metal Oxide Silicon) Cell Library for a Silicon Compiler.
NAVAL POSTGRADUATE SCHOOL MONTEREY CA
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A standard Complementary Metal Oxide Silicon library CMOS for use in Very Large Scale Integration VLSI circuits was developed. The development includes investigation of the various clocking strategies upon which the optimun clocking strategy, pseudo two phase, was selected for all clocked cells in the library. The cells were then designed using the pseudo two phase clocking strategy. A primary objective is to provide cells for use in converting the MACPITTS silicon compiler from n-channel Metal Oxide Silicon NMOS to Cmos technology. Cell layouts, timing data, schematics and logic tables for each cell are provided. Keywords Theses, Obsolescence, Libraries, Technology, Clocks, Compilers, Chips.
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