Accession Number:

ADA180092

Title:

A New Multi-Decoder PLA Design.

Descriptive Note:

Final technical rept. Dec 85-Jan 87,

Corporate Author:

STATE UNIV OF NEW YORK AT BUFFALO AMHERST

Personal Author(s):

• Fan,Adly T.
• Vitallo,Mathew R.
• Pronobis,Mark T.

Report Date:

1987-03-01

Pagination or Media Count:

9.0

Abstract:

A multi-decoder design for Programmable Logic Array devices is introduced and found to be both two decoder ROM and single decoder PLA devices in implementing a special class of Boolean expressions. In this class, the logic expressions may be lengthy but are restricted in the number of input variables comprising each p-term. A theoretical analysis of the area efficiency of the new design is supplemented by CAD design examples which verify its superiority. Implementation of the multi-decoder design using three dimensional microcircuit topography to attain even greater savings in area and speed is considered in the conclusion of this report.

Descriptors:

• *COMPUTER PROGRAMMING
• *LOGIC CIRCUITS
• *LOGIC DEVICES
• *DECODERS
• EFFICIENCY
• INPUT
• VARIABLES
• ARRAYS
• THEORY
• BOOLEAN ALGEBRA
• MICROCIRCUITS
• THREE DIMENSIONAL
• TOPOGRAPHY
• MEMORY DEVICES
• INPUT OUTPUT PROCESSING

Subject Categories:

• Computer Systems
• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE