Accession Number:

ADA162536

Title:

A Vision Chip,

Descriptive Note:

Corporate Author:

MASSACHUSETTS INST OF TECH CAMBRIDGE ARTIFICIAL INTELLIGENCE LAB

Personal Author(s):

Report Date:

1981-05-01

Pagination or Media Count:

55.0

Abstract:

The time has come for workers in artificial intelligence to begin building hardware. The theories and algorithms being proposed in AI exceed the capabilities of standard computers. Also, the understanding gained in the hardware implementation of a theory is probably not available any other way. The field of vision is one where progress awaits the speed that hardware implementations can provide. Some well understood and well justified algorithms for early visual processing must be implemented in hardware for later visual processing to be studied. This paper describes the design and hardware implementation of a particular operator or visual processing. I constructed an NMOS VLSI circuit that computes the gradient and detects zero-crossings, in a digital video image in real time. The algorithms employed by the chip, the design process that led to it, and its capabilities and limitations are discussed. The most difficult aspect of the construction of my vision chip was the attention that had to be paid to very low level detail. For hardware to be a useful tool for AI designing it must be as much like programming as possible. This paper concludes with some discussion of how such a goal can be met. Keywords include VLSI design Vision hardware and Early vision.

Subject Categories:

  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE