A Coherent VLSI Design Environment.
Semiannual technical rept. 1 Oct 84-31 Mar 85,
MASSACHUSETTS INST OF TECH CAMBRIDGE DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE
Pagination or Media Count:
This report covers the period from October 1, 1984 through March 31, 1985. The research discussed here is described in more detail in several published and unpublished reports cited below. Several fundamental bounds on the complexity of network architecture, parallel computation, VLSI design, and algorithms have been established andor improved during this period. The grid-matching problem, of importance to wafer-scale integration, is close to solution, Improved algorithms for two-layer channel routing have been developed. The fat-tree interconnection network has been studied further, and a better algorithm for on-line routing of messages in this network has been developed. There is continued interest in compaction, and a provably fast algorithm for solving constraint systems has been devised. The CAD frame Schema has been solidified in several ways during this period. It is now possible to use Schema as a schematic capture and data storage system, There is better support being developed for PC-board designs. Some advanced ideas in describing waveforms qualitatively are being incorporated. A novel PROM device that is UV-enabled for writing has been designed and tested. The tradeoff between speed and fault probability in AD converters has been viewed from a new angle.
- Electrical and Electronic Equipment