Investigation of Metallic Impurities Introduced into SiO2 and Silicon by Various Candidate VLSI Metallization Systems: Chemical Reactions, Diffusion, and Electrical Properties
STANFORD UNIV CA STANFORD ELECTRONICS LABS
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The main objectives of this project were to investigate the diffusion of various gate metals into SiO2 and the diffusion of metals into silicon from contact metallization. The bulk of the work was performed on SiO2, and experimental diffusion results were obtained for Ag, Cu, Pd, Au, Ta, and Ti. From these results, a model for interstitial diffusion in SiO2 was developed that predicts both the ionization state and activation energy for diffusion and solid solubility as a function of temperature. The work concluded that Pd, Au, Mo, Ta, W, Pt, Ti, and Al are suitable candidates for VLSI gate and interconnect metallizations, whereas Ag, Cu, Na, Ni, Mn, Fe, Mg, and Ga are not. This report covers work performed to detect and measure the diffusion of contact metals into crystalline Si. This effort encountered more experimental problems than the SiO2 case, partially because in VLSI technology there are both different types on contacts and varying junction depths present below the contacts. Realizing the importance of these points enabled us to choose a suitable mask set to take these parameters into account. The parameters on interest in this work are junction depth, junction conductivity type overlapped or enclosed junction geometry, and contact metallization. Junctions with different combinations of these parameters are subjected to Bias Current Temperature Stressing BJTS at elevated temperatures to simulate a long Dt diffusion. The various diodes are packaged to avoid direct probing, and to make sure the temperature is constant for all diodes undergoing BJTS.
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