Ion Implanted GaAs I.C. Process Technology
Quarterly technical rept. no. 7, 1 Jan-31 Mar 1979
ROCKWELL INTERNATIONAL THOUSAND OAKS CA ELECTRONICS RESEARCH CENTER
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This report covers the second quarter, Phase II of a program on ion implanted planar GaAs gallium arsenide integrated circuit technology. The overall objective of this program is the development of a manufacturable process for high-speed low-power GaAs logic circuits. The goal for Phase I was to establish the technology, and demonstrate its viability by fabricating circuits reaching MSI complexity. The goal for Phase II is to achieve the capability of fabricating GaAs ICs of LSI complexity. The most important result in this quarter was the successful demonstration of an 81 data multiplexer and a 18 data demultiplexer operating at clock rates as high as 1.1 GHz. In addition, operation of 8 circuits has been observed at frequencies as high as 1.9 GHz. Thus, the design objective for the operating speed of these demonstration circuits has been achieved.
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