Development of the Symbolic Processing Algorithmic Research Computer (SPARC)
Semi-annual rept. 1 Jun-30 Nov 1978
CONTROL DATA CORP MINNEAPOLIS MN IMAGE SYSTEMS DIV
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This report summarizes progress on development of the SPARC processor which was started by ARPA in 1977. This is a joint research effort in computer architecture by Carnegie Mellon University and Control Data Corporation to develop a processor concept which anticipates future image processing needs. This processor was designed, using state-of-the-art technology and automated design techniques, as an add-on for general purpose host computers. In addition, work was also in progress at CDC to develop a multiple processor architecture which utilizes extended versions of the SPARC processor. A key feature of this new architecture is a flexible, high-bandwidth, inter-processor communication network known as the ring system. Initial requirements definitions and preliminary reference manuals for a microcode cross assembler and a register- level simulator have been written.
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