Multi-Dimensional Signal Processing Research Program
Semiannual technical summary rept. 1 Apr-30 Sep 1983
MASSACHUSETTS INST OF TECH LEXINGTON LINCOLN LAB
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This Semiannual Technical Summary covers the period 1 April through 30 September 1983. It describes the significant results of the Lincoln Laboratory Multi-Dimensional Signal Processing Research Program, sponsored by the Rome Air Development Center, in the areas of multiprocessor architectures for image processing and algorithms for object detection and region classification in aerial reconnaissance imagery. Section 2 presents a discussion of recent efforts in improving the target detection algorithm developed in FY82. The improvements lie in modifying the algorithm to detect targets of size comparable to that of the estimation window. In Section 3, the use of a systolic architecture for implementing the target detection algorithm is discussed. Systolic arrays have great potential for utilizing the available parallelism in highly structured computations. A major drawback in some of these types of arrays is an inherent lack of flexibility. However, for some multi-dimensional signal processing applications, this lack of flexibility may not be important. Section 4 contains a description of the custom-designed chip to implement the basic switching element for a butterfly interprocessor communications network. The custom chip was fabricated with NMOS technology using the DARPA silicon foundry facilities.
- Computer Hardware
- Military Operations, Strategy and Tactics