Accession Number:

ADA141083

Title:

Multiprocessor Z-Buffer Architecture for High-Speed, High Complexity Computer Image Generation.

Descriptive Note:

Final rept.

Corporate Author:

BOEING AEROSPACE CO SEATTLE WA

Personal Author(s):

Report Date:

1983-12-01

Pagination or Media Count:

313.0

Abstract:

This report describes the results of the second phase of a three-phase program to develop innovative, high-complexity computer image generation CIG system. The foundation of this CIG system is a multi-processor implementation of the z-buffer hidden-surface algorithm. The research program accomplished the following Real-time special-purpose hardware to render shaded triangles into a displayable image A non-real-time software simulation of the front-end of a CIG system Software to construct databases from the Defense Mapping Agencys Digital Terrain Elevation Data tapes and from the output of a general-purpose CAD system and Software developed to investigate additional topics in computer graphics, such as fractals, curved surfaces, transparencies, texture mapping, and level-of-detail control.

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE