Accession Number:

ADA136555

Title:

A CRAY-Class Multiprocessor Simulator.

Descriptive Note:

Technical rept.,

Corporate Author:

MICHIGAN UNIV ANN ARBOR SUPERCOMPUTER ALGORITHM RESEARCH LAB

Personal Author(s):

Report Date:

1983-09-01

Pagination or Media Count:

130.0

Abstract:

A logical-timing instruction-level simulator is described for a hypothetical multiprocessor consisting of CRAY-1s connected to a common memory. It is useful for gaining insight into the design of multiprocessor algorithms and for developing high performance algorithms for CRAY processors with instruction sets similar to the CRAY-1. Author

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE