Universal Pin Electronics.
Final rept. Aug 81-Sep 82,
GIORDANO ASSOCIATES INC SPARTA NJ
Pagination or Media Count:
The report describes a unique and advanced test system architecture which has the ability to put virtually an entire test system into a test head and is capable of operating at repetition rates of 100MHz and with test vectors of 250,000 bits deep. In addition, this new architecture has the potential to also provide extended analog capability with greatly improved reliability in a small physical package and at a reduced cost over conventional automatic test equipments. Block diagrams of the overall system, major subsystem and the single channel are presented and described. Specifications of the overall system and the single channel are also presented. In addition to its use as an off-line ATE, this architecture can bring its inherent testing power directly to built-in-test BIT applications. Author
- Computer Programming and Software
- Computer Hardware
- Test Facilities, Equipment and Methods