Accession Number:

ADA114029

Title:

An Implementation of MIL-STD-1750 Airborne Computer Instruction Set Architecture.

Descriptive Note:

Technical memo.,

Corporate Author:

ROYAL AIRCRAFT ESTABLISHMENT FARNBOROUGH (ENGLAND)

Personal Author(s):

• Shrimpton,S. J.

Report Date:

1981-05-01

Pagination or Media Count:

151.0

Abstract:

This Memorandum describes the design of a processor implementing the Mil-Std-1750 Airborne Computer Instruction Set Architecture, using Advanced Micro Devices 2901 bit-slice microprocessor devices. The aspects of the hardware design and microcode specific to Mil-Std-1750 are discussed and reviewed in the light of the experience gained. A full listing of the AMD AMDASM micro assembler definition file and microcode source text is included, together with a full hardware documentation. Author

Descriptors:

• *COMPUTER ARCHITECTURE
• *COMPUTER AIDED INSTRUCTION
• ASSEMBLERS
• SIGNAL PROCESSING
• STANDARDIZATION
• AVIONICS
• CENTRAL PROCESSING UNITS
• INTERFACES
• CHIPS(ELECTRONICS)
• MICROPROCESSORS
• MILITARY REQUIREMENTS
• SPECIFICATIONS
• COMPUTER FILES
• UNITED KINGDOM

Subject Categories:

• Computer Programming and Software
• Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE