Accession Number:

ADA109134

Title:

A Study of the Multicache-Consistency Problem in Multi-Processor Computer Systems

Descriptive Note:

Technical rept.

Corporate Author:

ALFRED P SLOAN SCHOOL OF MANAGEMENT CAMBRIDGE MA

Report Date:

1981-09-01

Pagination or Media Count:

145.0

Abstract:

This paper is a report on an ongoing research project at the M.I.T. Sloan School of Management to study the multicache-consistency problem in multi- processor computer systems. The nature of the consistency problem in multicache memory systems is briefly discussed, together with an explanation of the three common approaches proposed in the literature to handle it. A new solution to the problem, called the Common-CachePended Transaction Bus CCPTB approach, is developed and discussed. The CCPTB approach attempts to minimize performance degradation by eliminating the overhead of maintaining cache-consistency. Its two distinctive features are Firstly, the conventional private cache per processor organization is replaced by one where a pool of cache-modules is commonly shared by all processors. Secondly, the Pended Transaction Bus PTB is used as the interconnection protocol that connects the processors and the cache- modules. The performance of the CCPTB approach is evaluated using a highly detailed simulation model with favorable results. Author

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware
  • Computer Systems

Distribution Statement:

APPROVED FOR PUBLIC RELEASE