Computer Aided Design of Integrated Circuit Fabrication Processes for VLSI Devices
Semi-annual technical status rept. 16 Feb 1980-14 Aug 1980
STANFORD UNIV CA INTEGRATED CIRCUITS LAB
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The organization of this report corresponds to that of the contract proposal with sections devoted to Thermal Oxidation, Ion Implantation, Chemical Vapor Deposition of Silicon, Materials Analysis and Interface Physics, and Process Model Implementation in SUPREM. In each section, there will be a brief description of progress made, including difficulties encountered, results obtained with their supporting data, and plans for the future.
- Electrical and Electronic Equipment
- Solid State Physics