Accession Number:

ADA094729

Title:

Design of a Low Power Schottky TTL High-Speed Digital Phase-Locked Loop Integrated Circuit.

Descriptive Note:

Final rept. 1 Apr 77-30 Jun 80,

Corporate Author:

TEXAS INSTRUMENTS INC DALLAS SEMICONDUCTOR GROUP

Personal Author(s):

Report Date:

1980-10-01

Pagination or Media Count:

54.0

Abstract:

A high speed digital phase-locked loop DPLL integrated circuit was successfully designed and implemented with Low Power Schottky technology. The Avionics Laboratory sponsored the development of the SN54LS297 DPLL IC, which was designed to become a standard Texas Instruments catalog part. This device uses strictly digital techniques to perform the first order phase-locked loop linear function and can be cascaded to form higher order phase filters. The center frequency and bandwidth are digitally programmable, and Qs of 8 to 130,000 can be obtained, making possible narrow-bandwidth phase tracking with higher resolution than conventional phase-locked loops. Author

Subject Categories:

  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE