Accession Number:

ADA093735

Title:

Development of a Methodology for Verifying Military Computer Family Built-in-Test Performance Specifications.

Descriptive Note:

Final rept. 22 May 79-21 May 80,

Corporate Author:

RESEARCH TRIANGLE INST RESEARCH TRIANGLE PARK NC SYSTEMS AND MEASUREMENTS DIV

Personal Author(s):

Report Date:

1980-09-01

Pagination or Media Count:

183.0

Abstract:

A previous study has addressed the identification of built-in-test BIT techniques for the Military Computer Family MCF. In that study, appropriate BIT techniques were identified based upon an assumed fault population. A model was developed to predict where in the system these faults are most likely to occur. Based upon this model, a rationale was developed for deploying built-in-test resources and a unified BIT approach for MCF was recommended. A later study focused on the identification of relevant BIT requirements for Military Computer Family form, fit and function F3 specifications. The present study was concerned with extending the BIT performance assessment methodology for verifying MCF built-in-test performance and the application of this methodology to a particular member of the Military Computer Family. The recommended approach is to describe MCF functional modules using ISP language descriptions. The PDP-1170 member was selected as representative. The PDP-1170 modules were verified to insure their proper functional behavior and the previously recommended BIT approaches were described in ISP and applied to these modules. In order to validate BIT performance for modules, a functional fault model was developed.

Subject Categories:

  • Computer Programming and Software
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE