CCD Corner-Turning Memory.
Final technical rept. 27 Sep 77-30 Jun 79,
TEXAS INSTRUMENTS INC DALLAS CENTRAL RESEARCH LABS
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Two analog CCD reformatting memories were designed and fabricated using an n-channel, double-level, self-alighed polysilicon gate process. These unique CCD structures employ two-dimensional charge transfer cells in a square memory array 32 x 32 and 64 x 64 elements which is accessed by means of integrated CCD demultiplexer and multiplexer structures, resulting in greater dynamic range than observed in previous line-addressed designs. Details related to the design of this complex device and the results of experimental tests are presented. A secondary objective involved the development of a process-compatible bipolar output device for high speed applications. An analysis of this bipolar output circuit is presented, and experimental results are discussed. Author
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