A Development System for Microprocessor Based Pattern Recognizers. Volume I.
AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OHIO SCHOOL OF ENGINEERING
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A tool for developing microprocessor based pattern recognizers is presented. A two segment system of programs is implemented. One segment is a subsystem consisting of a generalized pattern classifier program and utility routines for an INTEL SBC 8020 microprocessor system. The other segment is a subsystem of four interactive programs. These four programs support feature selection, pattern class definition and performance evaluation using procedures fitted to the classifier algorithm. This subsystem operates on a user supplied file of feature vectors. It produces a class defining structure for use by the classifier. It can use a TEKTRONIX 4014 for graphics support and will operate interactively within the CDC 6600 Intercom partition. Structured design, modular code, buffer allocation algorithms, and ANSI standard FORTRAN code make this segment transportable. The classifier segment requires an 8080 system. Less than 256 bytes of ROM are used. Data buffer locations and sizes, the number of classes and the number of features are specified by the user. Experiments produced estimates of classifier performance for this system. An error rate of less than ten percent is reported for one 26 class character recognition experiment. Author
- Computer Programming and Software
- Computer Hardware
- Human Factors Engineering and Man Machine Systems