Accession Number:

ADA063800

Title:

CCD Long-Time Delay Line.

Descriptive Note:

Interim rept. no. 1, 15 May 77-15 Feb 78,

Corporate Author:

RCA LABS PRINCETON N J

Personal Author(s):

• Kosonocky,W. F.
• Sauer,D. J.

Report Date:

1978-11-01

Pagination or Media Count:

50.0

Abstract:

A low-loss mode for operating CCDs is described that should lead to a decrease of the transfer losses in long CCD structures by more than two orders of magnitude. The analysis indicates that a buried-channel CCD operating in the low-loss mode should have an effective transfer loss of less than 10 to the -7th power per transfer. This report also describes the design of a low-loss CCD test chip containing 256- and 1024-stage, closed-loop CCDs. Operating as low-loss CCDs, these devices can store and recirculate 128 and 512 signal samples, respectively. The closed-loop CCD structures include a provision for adding input signal to the signal already present in the loop. In addition to the low-loss signal regeneration stages one in the smaller loop and two in the larger loop, each closed-loop CCD also includes two floating-gate outputs for nondestructive output sensing, a floating-diffusion output for a destructive readout, and a dark-current subtraction stage. Also described in the report is the design of a programmable tester for operating the closed-loop CCDs on the low-loss CCD test chip. Author

Descriptors:

• *LOW LOSS
• *DELAY LINES
• *CHARGE COUPLED DEVICES
• GATES(CIRCUITS)
• CHIPS(ELECTRONICS)
• CIRCUITS
• NOISE
• CLOSED LOOP SYSTEMS

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE