Transferred-Electron Logic Devices for Multigigabit-Rate Logic.
Final rept. 1 Dec 75-28 Feb 78,
RCA LABS PRINCETON N J
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The results of two-dimensional transient simulations of various types of transferred-electron logic devices TELDs are described. The computer programs developed are simple enough to run on any minicomputer, yet great detail of device performance is obtained. Planar GaAs logic devices are studied as simple logic gates TELDs utilizing a Schottky-barrier gate as an input. A logic gate formed by a FET-triggered two-terminal TED is analyzed. The waveforms of capacitive-output electrodes are developed. GaInSb logic gates, enhancement-mode TELDs, and transverse-domain-spreading devices are simulated and some difficulties with these devices are observed. The operation of an exclusive-OR circuit constructed with two TELDs is described. A simple GaAs TELD gate was shown to be capable of a gain of 1.25, a propagation delay of 26 ps, and an output rise time of 16 ps for a fan-out of 2, with a power dissipation of about 120 mW. A full adder circuit constructed with TELDs should have a propagation delay of about 100 ps. The FET-triggered-TED with capacitive-output electrodes should be suitable for logic arrays and have propagation delay and bias power similar to a TELD. All such logic arrays require input data streams that can be generated by TED interfacing cirucits. Author
- Electrical and Electronic Equipment
- Computer Hardware