Development of InSb CID Array Technology.
Final rept. May 77-Feb 78,
GENERAL ELECTRIC CO SYRACUSE N Y OPTOELECTRONIC SYSTEMS OPERATION
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Further improvement on both line and two-dimensional InSb CID arrays has been made. Array performance has been improved by using thinner-gate oxide, thicker field oxide, lower-doping substrate materials, and lower noise amplifier. The co-planar two-dimensional array structure also has been further improved. Array performance efficiencies, which include transfer, quantum and readout efficiencies of over 30, and transfer efficiencies of over 98 have been measured on two dimensional arrays. Effort on a low-noise preamplifier has been carried out and performance of the JFET preamplifier is much better than that of the MOSFET. The NETD for a line array was found to be about 0.1K using a JFET preamplifier and 0.5K using a MOSFET. The measurement was made with a narrow spectral filter of 3.6 to 4.0 micrometers, f3.25 lens system, and a 500 microsecond integration time. Author
- Electrical and Electronic Equipment
- Infrared Detection and Detectors
- Solid State Physics