Integrated Low Noise Buried Channel MOSFET Preamplifier Technology.
Final technical rept. 1 Apr 76-30 Jun 77,
TEXAS INSTRUMENTS INC DALLAS CENTRAL RESEARCH LABS
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The objective of the effort was to establish the device design and processing guidelines necessary to fabricate an integrated buried channel MOS preamplifier using the current Texas Instruments buried channel MOSFETCCD processing technology. Geometric, processing, and bias parameters predicted by theory and previous experimental evidence to influence noise performance in MOSFET structures were defined. The buried channel MOSFET was chosen as the vehicle for achieving low level preamplifier noise characteristics because of its superior low frequency noise performance and its process-compatibility with the buried channel CCD process. Experimental evaluation was carried out on existing devices processed at Texas Instruments prior to the beginning of this contract, and from the results of that evaluation a low noise buried channel MOS preamplifier bar was designed. In addition to the preamplifier circuit, the design included a matrix of test MOSFETs, both surface and buried channel, to allow a more extensive evaluation of MOSFET noise characteristics as a function of the previously mentioned parameters. Low frequency noise performance in buried channel MOSFETs was discovered to be strongly dependent on several processing parameters, as well as on design parameters such as device geometry and bias.
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